A vast network of computers is being harnessed to design components for the next generation of silicon chips.
Simulations假装，模拟 of transistors晶体管 smaller than 30 nanometres (billionths of a metre) are being run on the UK e-science grid, which links thousands of computers.
The results will help designers cope with the physical constraints系统规定参数 that occur when working at such tiny scales.
About 20 years worth of processing time has been used by simulating hundreds of thousands of tiny transistors.
The researchers hope to get a sense of how such tiny components vary to work out the best way to produce future generations of chips with even smaller components.
"What we do in these simulations is try to predict the behaviour of these devices in the presence of atomic scale原子尺度 effects," said Professor Asen Asenov, head of the device modelling group at the University of Glasgow, which is leading the NanoCMOS simulation project.
The increasing power of silicon chips is largely dictated by the size of the components that chip makers can cram塞满，填满 on to each chunk组块 of silicon. The basic building block of a chip is the transistor, tiny switches that can either be "on" or "off".
The current generation of chips use transistors with features around 32 nanometres in size, but many manufacturers will move to 22 nanometres soon.
"These problems started to appear a couple of generations ago but right now it's one of the most serious problems," said Prof Asenov.
"What's happening at such dimensions is that the atomic structure of the transistor cannot be precisely controlled," he said. "In order to make them work we have to put in impurities杂质 to define different regions."
Prof Asenov and his team are not seeking the perfect design for a transistor, instead they are finding out how best to lay down materials so transistors perform consistently.
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